1. Field of Invention
The present invention relates to a method for testing liquid crystal display panels. More particularly, the present invention relates to a method for testing liquid crystal display panels with gate drivers and gate lines integrated thereon.
2. Description of Related Art
As the market for electronics products continues to grow, the demand for liquid crystal display (LCD) panels grows accordingly. This demand is due to the use of LCDs in electronics products, such as television screens, computer screens, and mobile phone screens. Accordingly, the testing of the LCD panels includes the full contact method and the shorting bar method. The advantage of the full contact method is good testing performance, but the full contact method consumes much time. The shorting bar method may decrease the testing time, because this method divides the gate lines into groups of odd and even gate lines, and connects all the clock signal inputs, all the start pulse inputs, and all the pull down signal inputs together, respectively. Therefore every gate lines does not need an independent signal, and may input a single signal to the connection points mentioned above. Testing may start by enabling all the odd gate lines. After the testing of the odd gate lines is completed, the gate lines are disabled, while the even gate lines are being tested. The testing area is decided by a multiplexer, and the multiplexer simultaneously provides pixel voltages to all the areas.
The shorting bar method is suitable for LCD panels without the gate drivers integrated thereon. Therefore when the gate drivers are integrated on the LCD panel, namely, the gate on array (GOA) arrangement, the shorting bar method may not be applied. The reason is in the shorting bar method, the signal used to enable the gate lines are inputted directly from the inputs of the gate line, which bypasses the gate drivers. When the gate driver is electrically connected to the gate lines, the shorting bar method then will not be able to be inputted from the inputs of the gate lines.
The current testing method of the GOA panels is to input a driving signal into the input of the first gate driver on the panel. When the first gate driver is driven, the first gate line is enabled. The driving signal will be sent from the first gate driver to the second gate driver, while disabling the first gate driver and enabling the second gate driver, and so on.
FIG. 1 is a diagram of the testing method of the GOA panel. If the testing starts sequentially from the top gate line down, when a gate line 101 has a defect 102, then the testing is terminated, and the other defects after the defect 102 on the remaining gate lines 103 will not be detected. From there, the panel will undergo a second round of testing after the detected defect is fixed. If another defect (not shown) is detected in the second round of testing, then the testing is terminated, leaving the remaining gate lines untested, and discarding the panel. Therefore, one will never know whether the panel has additional defects after defect 102. If there is no more defects after defect 102, the discarding the panel results in a waste of material and lowers the yield.
For the forgoing reason, there is a need for a method for simultaneous testing of multiple gate lines on GOA panels. When the gate lines may be tested simultaneously, the probability of bypassing a possible defect during testing is greatly reduced.